In today's electronics-driven world, power is the key to keeping society in motion. However, with the increasing costs of power and, in handheld devices, the demand for increased battery life, the issue of power consumption in electronic devices has become of paramount importance. When computers lay idle for a period of time, many enter a power-collapsed state or standby state, in which power consumption is dramatically reduced. Handheld devices, such as mobile phones, when not in use, typically also enter a power-collapsed state, in which the power or battery is disconnected from many parts of the operating circuitry. Electronic components themselves have also been developed with lower power requirements. Taken as a whole, a considerable amount of technology has been developed for conserving power. While power consumption has been considerably reduced using these technologies, electronics designers are still generally limited by the power requirements of memory, and, in particular, the power requirements of memory to save state.
Modern electronics are typically designed to “wake up,” i.e., reestablish power when exiting from a standby state, without having lost any of the operational information in memory when the electronic device collapsed into the standby state. For example, a user who answers the phone in the middle of writing a letter in a word processor might leave the computer long enough for the computer to enter the standby mode. When the user comes back, he or she may wake the computer up and immediately continue writing the letter from the point at which he/she left off. Similarly, when a user reaches for his or her phone to make a call, the phone typically wakes up from its standby state (if the user was not currently using the phone), ready to receive dialing and make the call. Also, if a user is playing video using a digital signal processor (DSP) of a mobile device and a call arrives, causing the DSP to power collapse, the user should be able to return to the same video playback state after the call is completed or ignored. The user is not required to cold start the devices and reload the information from a disk drive or other external non-volatile memory storage in either of these examples. In order to accomplish this instant-on functionality, the information or application state is generally preserved even though the electronics have had power substantially reduced. The power is only moderately reduced because power is generally needed to preserve the information in the memory. While other components may be completely shut down or removed from the power supply, there is a certain amount of power that is usually always-on in order to keep the memory blocks from losing the information that is held.
Many electronic systems utilize static random access memory (SRAM) and dynamic random access memory (DRAM) because of their speed and density. However, SRAM and DRAM are both volatile memories, meaning they lose their information when power is removed. Thus, in order to maintain the state of SRAM and DRAM memories, power is maintained. One method for overcoming this always-on power state has been to incorporate flash memory into the electronic system. Flash memory is a non-volatile memory technology that will maintain its information when the power is removed. However, flash memory is generally too slow to replace SRAM and DRAM memories, so it is often used as an external storage point to store state information.
FIG. 1 is a block diagram illustrating an electronic system 10 featuring a typical memory configuration using a flash non-volatile memory 106. The system 10 is illustrated with an internal section 100 and an external section 101. The external section 101 is generally connected to the internal section 100 within the device. The illustrated components of the system 10 are connected via a bus 102. The SRAM memory block 103 provides local memory for the logic block 104 which includes various combinational logic components and latches using a system clock. A DRAM memory block 105 is provided in the external section 101 for local, yet external to the processing core of internal section 100, higher-volume random access storage for the system 10. The system 10 also includes a flash non-volatile memory (NVM) 106.
For purposes of the example illustrated in FIG. 1, the system 10 will be described as a system for use in a mobile phone. When the mobile phone of system 10 enters into the standby mode, all of the state information currently stored in the SRAM 103 and/or logic 104 is moved to the DRAM 105 on the same package. In one embodiment, the state information could be stored off chip into the flash NVM 106 from the DRAM 105. In this case the state information is encrypted incurring additional time and energy.
Thus, power from the battery of the mobile phone is used to scan the SRAM 103 and logic 104 for state information, and move that state information into the DRAM 105 over the bus 102. Additional power is used to then move the state information from the DRAM 105 over the bus 102 into the flash NVM 106. Conventionally, the amount of power consumed by transmission of data over a bus is a function of the length of the bus. Thus, a considerable amount of power is being drained from the battery to move all of the state information. Moreover, because flash memory is much slower to write than SRAM and DRAM memories, this process takes a considerable amount of time, relative to mobile phone functionality. This is not the only power and time usage during standby processing. When the mobile phone of the system 10 powers back up, power is drained from the battery again to re-install the state information back from the flash NVM 106 to the DRAM 105 (if the NVM 106 is actually used), and to the SRAM 103 and logic 104 from the DRAM 105. Thus, while the standby mode of the system 10 may consume less power because power is no longer used to maintain state in either the SRAM 103 or logic 104, a considerable amount of power is used transferring the state information to and from the DRAM 105 and possibly the flash NVM 106, in addition to the considerable time used in transferring that information back and forth.